LED Display Basic Hardware organization
The LED dot matrix display is made up of a combination of LEDs in dot-matrix configuration, which makes the configuration for large numbers of LEDs to be easily multiplexed. By multiplexing (more on multiplexing and how actually the LED dot matrix operation is explained in this post, click here), the number of IOs required to switch on LED is reduced.
LED Matrix
The dot matrix configuration of the LEDs is made in combination like 8x8, 16x8 or 16x16. The first connections of the LED, usually Anode, in the columns are made common i.e. connected together. And the other remaining pins, usually cathode, of LEDs in the rows are made common.
So, if a positive voltage is applied to any of the pins of the column and negative polarity to any of the row, then the dot or pixel or the LED intersection the row and column will light up. In that way, for an 8x8 matrix, we can control all 64 (8x8=64 LEDs in a matrix) LEDs with 8+8=16 wires.
Serial shift register
Even if for 8x8=64 LEDs, 1/4th of the pins (16) are required for controlling all the LEDs, but for displays with 800x800 pixels/LEDs, the total number of 8x8 matrices formed would be 100, meaning 100x16 (pins for each matrix)= 1600 pins/IOs required to operate the whole display.
Even if this huge number of IOs can be available from display controller or microprocessor, the wire connections to each of the matrix would make a huge mess, along with inflexible or non-customizable hardware.
So, to transport the data to each of the Matrix or LED, serial-in-serial & parallel-out shift registers are used, like 74HC595 (8-bit register), MBI5024 (16bit register), MAX6679(16 bit with special LED drivers with fault detection) etc.
With serial shift register for each matrix, only 1 wire for data, 1 wire for clock, 1 wire for latching data & 1 wire for Output enable would be required to drive the whole row. And the serial out data, from each of the shift register of a matrix, can be inputted to the neighboring matrix’s shift register.
Row Decoding
For columns, the shift registers reduced the required IO count to IOs just required to derive a single shift register, the same technique can be applied to connect to all of the row side pins of the matrices. Or more often, for simplicity of software to derive the display and also for fast processing, 3-8 decoders (74HC138) are commonly used for selecting and enabling a row of the display. With 3-inputs to 74HC138 8 rows of an 8x8 matrix can be selected. And for 16 rows selection, 2 x74HC138 can be multiplexed using ‘enable’ pins to form 4-16 decoder and so on for more rows.
Current sourcing and sinking of LEDs
By enabling the row means that allowing the circuit of LED to be completed. That is, if shift register provided 5V to the Anode of LED when data of binary ‘1’ is shifted-in, the ground or negative polarity to the cathode of LED is provided by ‘row enabler’, that is 3-8 decoder output pin.
As 1 row at a time is enabled by the 3-8 decoder, it means that the sum of the current for all 8 LEDs will pass through 3-8 decoder’s single output pin. That current can be way higher than the maximum current that the 3-8 decoder’s output pin can source or sink. So, for that, power drivers like simple power MOSFETs or BJTs can be used to source/sink display’s single row current, where the 3-8 decoder output would be switching On and Off those drivers.
Signal Buffering
It is a good practice to buffer the display data signal and control signals, like clock, output-enable, latch and row decoding selection. Buffers should be placed at the input side and also at the output stage, i.e. for cascading. In that way, the display module can be added & cascaded to form a wall as many as required without worrying about the fan-out etc.
Even if for 8x8=64 LEDs, 1/4th of the pins (16) are required for controlling all the LEDs, but for displays with 800x800 pixels/LEDs, the total number of 8x8 matrices formed would be 100, meaning 100x16 (pins for each matrix)= 1600 pins/IOs required to operate the whole display.
Even if this huge number of IOs can be available from display controller or microprocessor, the wire connections to each of the matrix would make a huge mess, along with inflexible or non-customizable hardware.
So, to transport the data to each of the Matrix or LED, serial-in-serial & parallel-out shift registers are used, like 74HC595 (8-bit register), MBI5024 (16bit register), MAX6679(16 bit with special LED drivers with fault detection) etc.
With serial shift register for each matrix, only 1 wire for data, 1 wire for clock, 1 wire for latching data & 1 wire for Output enable would be required to drive the whole row. And the serial out data, from each of the shift register of a matrix, can be inputted to the neighboring matrix’s shift register.
Row Decoding
For columns, the shift registers reduced the required IO count to IOs just required to derive a single shift register, the same technique can be applied to connect to all of the row side pins of the matrices. Or more often, for simplicity of software to derive the display and also for fast processing, 3-8 decoders (74HC138) are commonly used for selecting and enabling a row of the display. With 3-inputs to 74HC138 8 rows of an 8x8 matrix can be selected. And for 16 rows selection, 2 x74HC138 can be multiplexed using ‘enable’ pins to form 4-16 decoder and so on for more rows.
Current sourcing and sinking of LEDs
By enabling the row means that allowing the circuit of LED to be completed. That is, if shift register provided 5V to the Anode of LED when data of binary ‘1’ is shifted-in, the ground or negative polarity to the cathode of LED is provided by ‘row enabler’, that is 3-8 decoder output pin.
As 1 row at a time is enabled by the 3-8 decoder, it means that the sum of the current for all 8 LEDs will pass through 3-8 decoder’s single output pin. That current can be way higher than the maximum current that the 3-8 decoder’s output pin can source or sink. So, for that, power drivers like simple power MOSFETs or BJTs can be used to source/sink display’s single row current, where the 3-8 decoder output would be switching On and Off those drivers.
Signal Buffering
It is a good practice to buffer the display data signal and control signals, like clock, output-enable, latch and row decoding selection. Buffers should be placed at the input side and also at the output stage, i.e. for cascading. In that way, the display module can be added & cascaded to form a wall as many as required without worrying about the fan-out etc.
Display Basic module
A basic display module of a display wall/screen is the one with which, the whole wall/screen is composed of. A basic display module is cascaded in series to form a row and several rows of cascaded basic display modules are stacked to form a display wall.
The basic display module pixel size should be kept such as that most of the common size display walls can be made by cascading it.
Next: LED Dot Matrix Display Operation
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